Program.bin is the binary of the baremetal program to be executed. The bootloader automatically programs the FPGA using this file. The fpga.rbf file is the FPGA programming file, generated by the Intel FPGA Monitor Program (or Quartus). The bootloader looks at the FAT32 partition of the SD card, for the following files: The preloader initializes the hardware, then launches the bootloader. "This SD card image contains the UBoot preloader and bootloader. The board is now run with the SD image coming with "FPGA Monitor Program 18.1" the contents described in the README.txt: Please ensure the FPGA has been configured using the correct. Make: *** No rule to make target `compile'. Info: Total CPU time (on all processors): 00:00:04Ĭd F:/de10-nano/Tutorials/FPGA_Monitor/18.1/arm/ make compile Info: Peak virtual memory: 4465 megabytes Info: Quartus Prime Programmer was successful. Info (209011): Successfully performed operation(s) Info (209007): Configuration succeeded - 1 device(s) configured Info (209017): Device 2 contains JTAG ID code 0x02D020DD Info (209016): Configuring device index 2 Info (213011): Using programming file G:/intel/FPGA/Lite/18.1/University_Program/Computer_Systems/DE10-Nano/DE10-Nano_Computer/verilog/DE10_Nano_Computer.sof with checksum 0x0B07E6FB for device (209060): Started Programmer operation at Sat Jan 23 04:29:01 2021 Info: Command: quartus_pgm -c "DE-SoC " -m jtag -o (213045): Using programming cable "DE-SoC " Info: Processing started: Sat Jan 23 04:28:56 2021 Info: refer to the applicable agreement for further details, at Info: Intel and sold by Intel or its authorized distributors. Info: the sole purpose of programming logic devices manufactured by Info: agreement, including, without limitation, that your use is for Info: the Intel FPGA IP License Agreement, or other applicable license Info: Subscription Agreement, the Intel Quartus Prime License Agreement, Info: to the terms and conditions of the Intel Program License Info: associated documentation or information are expressly subject Info: (including device programming or simulation files), and any Info: functions, and any output files from any of the foregoing Info: and other software and tools, and any partner logic Info: Your use of Intel Corporation's design tools, logic functions Info: Copyright (C) 2019 Intel Corporation. Info: Version 18.1.1 Build 646 SJ Lite Edition G:/intel/FPGA/Lite/18.1/quartus/bin64/quartus_pgm -c "DE-SoC " -auto Make: *** No rule to make target `clean'. Writing the makefile: F:/de10-nano/Tutorials/FPGA_Monitor/18.1/arm/makefileĬd F:/de10-nano/Tutorials/FPGA_Monitor/18.1/arm/ make clean Please advise if you need more screen captures. Please also find attaches a series of screen capture of the process following the instructions from the above said tutorial documentation. Please find appended below the transcript of the "Info&Errors". Tutorial for ARM.pdf" with "Intel FPGA Monitor Program" version 18.1 to work with the board DE10-Nano. I have been following the instructions in "Intel FPGA Monitor Program
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